A new low-temperature high-aspect-ratio MEMS process using plasma activated wafer bonding

This paper presents the development and characterization of a new high-aspect-ratio MEMS process. The silicon-on-silicon (SOS) process utilizes dielectric barrier discharge surface activated low-temperature wafer bonding and deep reactive ion etching to achieve a high aspect ratio (feature width reduction-to-depth ratio of 1:31), while allowing for the fabrication of devices with a very high anchor-to-anchor thermal impedance (>0.19 x 10(6) K W-1). The SOS process technology is based on bonding two silicon wafers with an intermediate silicon dioxide layer at 400 degrees C. This SOS process requires three masks and provided numerous advantages in fabricating several MEMS devices, as compared with silicon-on-glass (SOG) and silicon-on-insulator (SOI) technology, including better dimensional and etch profile control of narrow and slender MEMS structures. Additionally, by patterning the intermediate SiO2 insulation layer before bonding, footing is reduced without any extra processing, as compared to both SOG and SOI. All SOS process steps are CMOS compatible.