Research on testing of a microsystem based on SiP

被引：0

作者：

Zhao, Xiongbo ^{[1
]}

Jiang, Penglong ^{[1
]}

Liu, Liangliang ^{[1
]}

机构：

[1] Natl Key Lab Sci & Technol Aerosp Intelligent Con, Beijing 100854, Peoples R China

来源：

2013 14TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT) | 2013年

关键词：

SIP; final test; DSU; JTAG;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

System in Package (SiP) technology satisfies the further increasing demand by integration of different functions into one unit to reduce size and improve functionality. But the disadvantages of SiP are also increased risks in reliability, manufacturability, and difficulty with test access. A complete final test is necessary before its application. This paper presents a functional test scheme for a mircosystem based on 3D-SiP. Test system consists of a test board designed specifically and Cygwin environment of PC in debug support unit (DSU) and JTAG TAP techniques. It allows the complete final system-testing carry out in a fast, flexible, and nondestructive way. And it can improve the testability and reliability of microsystem.

引用

页码：37 / 40

页数：4