Implementing ultra-high-value floating tunable CMOS resistors

被引：80

作者：

Tajalli, A. ^{[1
]}

Leblebici, Y. ^{[1
]}

Brauer, E. J. ^{[2
]}

机构：

[1] Swiss Fed Inst Technol EPFL, Microelect Syst Lab LSM, CH-1015 Lausanne, Switzerland

[2] No Arizona Univ, Dept Elect Engn, Flagstaff, AZ 86011 USA

来源：

ELECTRONICS LETTERS | 2008年 / 44卷 / 05期

关键词：

D O I：

10.1049/el:20082538

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A compact high-value floating resistor utilising PMOS devices in the subthreshold region is introduced. A test chip has been fabricated in 0.18 mu n CMOS technology to verify the proposed concept. This technique has been applied to design a reconfigurable sixth-order very-low-cutoff-firequency MOSFET-C filter.

引用

页码：349 / 351

页数：3

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