Projective Geometry and Precedence Constraint based Application Mapping on Multicore Network-On-Chip Systems

被引:0
|
作者
Porwal, Janak [1 ]
Diwale, Sanket [1 ]
Kumar, Vinay B. Y. [1 ]
Patkar, Sachin B. [1 ]
机构
[1] Indian Inst Technol, Dept Elect Engn, Bombay 400076, Maharashtra, India
来源
2014 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT) | 2014年
关键词
Projective Geometry; Unified Mapping and Scheduling; Mesh; Perfect Difference Set; Network-on-chip; Precedence Constrained Scheduling;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper we address the problems of mapping (spatial distribution) and scheduling (temporal distribution) of tasks of an application over multiple computational units or cores. Algorithms for these are chiefly of two kinds - one, mapping followed by scheduling and two - unified mapping and scheduling. In this paper, we explore a new network topology based on Projective Geometry (PG). We develop a precedence constrained scheduling based greedy algorithm to solve the combined mapping and scheduling problem. The algorithm is shown to perform better than other state of the art approches on large problem sizes. We also compare the efficiency of the algorithm on Mesh and PG networks and show that the PG network results in much better solutions (in terms of schedule makespan and link utilization). We propose the use of PG network topology combined with a simple greedy algorithm for designing highly efficient manycore network-on-chip (NoC) system.
引用
收藏
页数:4
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