Development of CoC (Chip-on-Chip) interconnection technology in hyperfine pitch

被引:0
作者
Nishiyama, T
Tago, M
Isozaki, S
Morishita, Y
机构
来源
NEC RESEARCH & DEVELOPMENT | 2003年 / 44卷 / 03期
关键词
CoC (Chip-on-Chip); SiP (System in Package); flip chip; gold bump;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
CoC (Chip-on-Chip) Interconnection Technology, an indispensable future technology, which comprises high performance SiP (System in a Package), has been developed. Gold bumps, electroplated in 50 mum-pitch on both LSI chips, were connected in the thermo-compression bonding process. Heat was provided only from the daughter chip side, and the mother chip was held at less than 100 degrees in consideration of manufacturing process. We investigated the connectivity and the electrical characteristic changes of transistors placed directly under bumps. By optimizing the process condition, good junction without damage was achieved.
引用
收藏
页码:231 / 234
页数:4
相关论文
共 2 条
[1]  
KURITA Y, 2002, P 12 MICR S MES 2002, P51
[2]  
KURITA Y, 2002, P MATE2003, P57