Time Resolved Imaging: From logical states to events, a new and efficient pattern matching method for VLSI analysis

被引：9

作者：

Bascoul, G. ^{[1
]}

Perdu, P. ^{[1
]}

Benigni, A. ^{[1
]}

Dudit, S. ^{[2
]}

Celi, G. ^{[2
]}

Lewis, D. ^{[3
]}

机构：

[1] CNES, DCT AQ LE, F-31400 Toulouse 9, France

[2] STMicroelectronics, F-38920 Crolles, France

[3] Univ Bordeaux, IMS Lab, F-33405 Talence, France

来源：

MICROELECTRONICS RELIABILITY | 2011年 / 51卷 / 9-11期

关键词：

D O I：

10.1016/j.microrel.2011.06.043

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Time Resolved Imaging (TRI) allows real time imaging of transitions in CMOS gates even for very deep submicron technologies at low power supply voltage. Anyway, the measured timing information differs from waveform measurement where logical states are easily extracted. We first introduce logical event with a 1 value when we have transition from one logical state to its complement (0-1 or 1-0) or 0 value when there is no change between 2 vectors. Events can be extracted from TRI database and then used for a very accurate and efficient pattern matching method. In this paper, we demonstrate how we move from logical state to events and the extreme accuracy of pattern matching. Results are shown on 45 nm CMOS technology. (C) 2011 Elsevier Ltd. All rights reserved.

引用

页码：1640 / 1645

页数：6

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[4]

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