Efficient pipeline FFT processors for WLAN MIMO-OFDM systems

被引：35

作者：

Sansaloni, T ^{[1
]}

Pérez-Pascual, A ^{[1
]}

Torres, V ^{[1
]}

Valls, J ^{[1
]}

机构：

[1] Univ Politecn Valencia, Dept Elect Engn, EPSG, Gandia 46730, Spain

来源：

ELECTRONICS LETTERS | 2005年 / 41卷 / 19期

关键词：

D O I：

10.1049/el:20052597

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The most area-efficient pipeline FFT processors for WLAN MIMO-OFDM systems are presented. It is shown that although the R2(3)SDF architecture is the most area-efficient approach for implementing pipeline FFT processors, RrMDC architectures are more efficient in MIMO-OFDM systems when more than three channels are used.

引用

页码：1043 / 1044

页数：2

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