Hardware Implementation of RBF Neural Network on FPGA Coprocessor

被引:0
|
作者
Yang, Zhi-gang [1 ]
Qian, Jun-lei [1 ]
机构
[1] Hebei Polytech Univ, Sch Comp & Automat Engn, Tangshan 063009, Peoples R China
来源
INFORMATION COMPUTING AND APPLICATIONS, PT 1 | 2010年 / 105卷
关键词
FPGA coprocessor; RBF neural network; VHDL; hardware implementation;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The compute core of a FPGA is a complicated programmable logic integrated circuit array which different from the ordinal instruction execution of the traditional computer. It changes the compute pattern of traditional compute and provides a new method to realize the high speed compute. Hardware Implementation is very important when considering computational velocity of neural networks (NNs), especially NNs with learning ability implemented by integrated hardware. Firstly, this paper presents the design of FPGA based coprocessor which is the hardware platform well-suited for the implementation of NNs. Secondly, it expounds hardware implementation of RBF (Radial Basis Function) Neural Network, and analyzes the performance and problem of the system. According the data of experiments, the compute speed of the RBF neural network implemented by hardware that realized by FPGA coprocessor is much higher than the speed of compute run on the PC.
引用
收藏
页码:415 / 422
页数:8
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