Extended memory lifetime in spiking neural networks employing memristive synapses with nonlinear conductance dynamics

被引:30
作者
Brivio, S. [1 ]
Conti, D. [2 ]
Nair, M., V [3 ,4 ]
Frascaroli, J. [1 ]
Covi, E. [1 ]
Ricciardi, C. [2 ]
Indiveri, G. [3 ,4 ]
Spiga, S. [1 ]
机构
[1] CNR, IMM, Unit Agrate Brianza, Via C Olivetti 2, I-20864 Agrate Brianza, Italy
[2] Politecn Torino, Dipartimento Sci Applicata & Tecnol DISAT, Corso Duca Abruzzi 24, I-10129 Turin, Italy
[3] Univ Zurich, Inst Neuroinformat, Winterthurerstr 190, CH-8057 Zurich, Switzerland
[4] Swiss Fed Inst Technol, Winterthurerstr 190, CH-8057 Zurich, Switzerland
基金
欧盟地平线“2020”;
关键词
RRAM; memristor; neuromorphic; spiking neural network; memory lifetime; ReRAM; HfO2; TIMING-DEPENDENT PLASTICITY; DEVICES; RETENTION; CIRCUIT; NEURONS; MODEL;
D O I
10.1088/1361-6528/aae81c
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
Spiking neural networks (SNNs) employing memristive synapses are capable of life-long online learning. Because of their ability to process and classify large amounts of data in real-time using compact and low-power electronic systems, they promise a substantial technology breakthrough. However, the critical issue that memristor-based SNNs have to face is the fundamental limitation in their memory capacity due to finite resolution of the synaptic elements, which leads to the replacement of old memories with new ones and to a finite memory lifetime. In this study we demonstrate that the nonlinear conductance dynamics of memristive devices can be exploited to improve the memory lifetime of a network. The network is simulated on the basis of a spiking neuron model of mixed-signal digital-analogue sub-threshold neuromorphic CMOS circuits, and on memristive synapse models derived from the experimental nonlinear conductance dynamics of resistive memory devices when stimulated by trains of identical pulses. The network learning circuits implement a spike-based plasticity rule compatible with both spike-timing and rate-based learning rules. In order to get an insight on the memory lifetime of the network, we analyse the learning dynamics in the context of a classical benchmark of neural network learning, that is hand-written digit classification. In the proposed architecture, the memory lifetime and the performance of the network are improved for memristive synapses with nonlinear dynamics with respect to linear synapses with similar resolution. These results demonstrate the importance of following holistic approaches that combine the study of theoretical learning models with the development of neuromorphic CMOS SNNs with memristive devices used to implement lifelong on-chip learning.
引用
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页数:12
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