Effect of polysilicon gate on the flatband voltage shift and mobility degradation for ALD-Al2O3 gate dielectric

被引：103

作者：

Lee, JH ^{[1
]}

Koh, K ^{[1
]}

Lee, NI ^{[1
]}

Cho, MH ^{[1
]}

Kim, YK ^{[1
]}

Jeon, JS ^{[1
]}

Cho, KH ^{[1
]}

Shin, HS ^{[1
]}

Kim, MH ^{[1
]}

Fujihara, K ^{[1
]}

Kang, HK ^{[1
]}

Moon, JT ^{[1
]}

机构：

[1] Samsung Elect Co Ltd, Proc Dev Team, Yongin Si 449711, Kyunggi Do, South Korea

来源：

INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST | 2000年

关键词：

D O I：

10.1109/IEDM.2000.904402

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Al2O3 (EOT=22.7 Angstrom) gate dielectric layer formed by Atomic Layer Deposition (ALD) process have been characterized for sub-100nm CMOS devices. The gate leakage current was 3 orders of magnitude lower than that of SiO2 and the hysteresis of C-V curve was not observed. However, the negative fixed charge induced the flat band voltage (Vfb) shift and degraded the channel mobility of MOS transistor. The Vfb shift was reduced and channel mobility was improved by applying Pc gate by BF2 implantation. It is suggested that the phosphorous diffused from gate polysilicon has a role of network modifier in Al2O3 film and formation of the Al-O- dangling bond which may be ascribed to negative fixed charge.

引用

页码：645 / 648

页数：4

共 8 条

[1] Effects of segregated Ge on electrical properties of SiO2/SiGe interface [J].

Ahn, CG ;

Kang, HS ;

Kwon, YK ;

Kang, B .

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1998, 37 (3B) :1316-1319

[2] Electrical characterization of alumina layers deposited by evaporation cell on Si and restructured InP substrates [J].

Benamara, Z ;

Tizi, S ;

Chellali, M ;

Gruzza, B ;

Bideux, L ;

Robert, C .

SYNTHETIC METALS, 1997, 90 (03) :229-232

[3]

DIMITROVA T, 1998, SOLID STATE ELECT, V42

[4] Conduction mechanisms in amorphous and crystalline Ta2O5 thin films [J].

Ezhilvalavan, S ;

Tseng, TY .

JOURNAL OF APPLIED PHYSICS, 1998, 83 (09) :4797-4801

[5] High quality ultra-thin TiO2/Si3N4 gate dielectric for giga scale MOS technology [J].

Guo, X ;

Ma, TP ;

Tamagawa, T ;

Halpern, BL .

INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST, 1998, :377-380

[6] Models for electron and hole mobilities in MOS accumulation layers [J].

Mudanai, S ;

Chindalore, GL ;

Shih, WK ;

Wang, H ;

Ouyang, Q ;

Tasch, AF ;

Maziar, CM ;

Banerjee, SK .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1999, 46 (08) :1749-1759

[7] SiON/Ta2O5/TiN gate-stack transistor with 1.8nm equivalent SiO2 thickness [J].

Park, DG ;

Lu, Q ;

King, TJ ;

Hu, CM ;

Kalnitsky, A ;

Tay, SP ;

Cheng, CC .

INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST, 1998, :381-384

[8] Effect of polysilicon gate type on the flatband voltage shift for ultrathin oxide-nitride gate stacks [J].

Wang, ZG ;

Parker, CG ;

Hodge, DW ;

Croswell, RT ;

Yang, N ;

Misra, V ;

Hauser, JR .

IEEE ELECTRON DEVICE LETTERS, 2000, 21 (04) :170-172

← 1 →