Energy efficient architectures for the Log-MAP decoder through intelligent memory usage

被引：2

作者：

Atluri, I ^{[1
]}

Kumaraswamy, AK ^{[1
]}

Chouliaras, VA ^{[1
]}

机构：

[1] Univ Edinburgh, Sch Engn & Elect, Edinburgh, Midlothian, Scotland

来源：

IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, PROCEEDINGS: NEW FRONTIERS IN VLSI DESIGN | 2005年

关键词：

D O I：

10.1109/ISVLSI.2005.29

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Turbo decoding generally employs maximum a posteriori (MAP) and the soft output Viterbi (SOVA) algorithm in its soft-input soft-output (SISO) component decoders. This paper reformulates the implementation of a low power Log-MAP decoder with reduced storage requirement and based on the optimized MAP algorithm that calculates the reverse state metrics in the forward recursive manner. As a result, the authors present new low power derivatives of this decoder through a variation in the percentage of memory savings. Three low power architectures of the Log-MAP decoder not employing the sliding window technique have been developed and post layout power savings of approximately 44%, 40% and 36% with respect to the conventional implementation have been observed.

引用

页码：263 / 265

页数：3