A 6.9-μm Pixel-Pitch Back-Illuminated Global Shutter CMOS Image Sensor With Pixel-Parallel 14-Bit Subthreshold ADC

被引:34
作者
Sakakibara, Masaki [1 ]
Ogawa, Koji [1 ]
Sakai, Shin [1 ]
Tochigi, Yasuhisa [1 ]
Honda, Katsumi [1 ]
Kikuchi, Hidekazu [1 ]
Wada, Takuya [1 ]
Kamikubo, Yasunobu [1 ]
Miura, Tsukasa [1 ]
Nakamizo, Masahiko [1 ]
Jyo, Naoki [2 ]
Hayashibara, Ryo [2 ]
Miyata, Shinya [1 ]
Yamamoto, Satoshi [1 ]
Ota, Yoshiyuki [1 ]
Takahashi, Hirotsugu [1 ]
Taura, Tadayuki [1 ]
Oike, Yusuke [1 ]
Tatani, Keiji [1 ]
Ezaki, Takayuki [1 ]
Hirayama, Teruo [1 ]
机构
[1] Sony Semicond Solut, Atsugi, Kanagawa 2430014, Japan
[2] Sony Semicond Mfg, Kumamoto 8691102, Japan
关键词
Analog-to-digital conversion (ADC); back illumination; CMOS image sensors (CIS); Cu-Cu connection; global shutter (GS); imagers; in-pixel ADC; stacking; subthreshold current;
D O I
10.1109/JSSC.2018.2863947
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, we report on a back-illuminated, global shutter, CMOS image sensor (CIS) with a pixel-parallel, single-slope analog-to-digital converter (ADC). We adopted a digital bucket relay transfer with multistage flip-flop connection, a pixel unit Cu-Cu connection, and positive-feedback circuitry, to realize a 6.9-mu m pixel-pitch, 1.46-Mpixel pixel-parallel ADC. By operating the comparator with a bias current in the sub-threshold region of 7.74-111 nA, we succeeded in reducing the peak current during simultaneous ADC. In combination with an ADC standby operation, we succeeded in further reducing the pixel-parallel ADC power consumption. With these techniques, we realized a normalized figure of merit of 0.24 nJ.e-rms/step calculated by dividing the entire sensor power by the effective ADC resolution at a subthreshold current of 111 nA during 660 frames/s operation.
引用
收藏
页码:3017 / 3025
页数:9
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