Energy-efficient memcapacitor devices for neuromorphic computing

被引:135
作者
Demasius, Kai-Uwe [1 ]
Kirschen, Aron [2 ]
Parkin, Stuart [1 ]
机构
[1] Max Planck Inst Microstruct Phys, Halle, Saale, Germany
[2] SEMRON GmbH, Dresden, Germany
关键词
MEMORY; ARRAY;
D O I
10.1038/s41928-021-00649-y
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Arrays of memcapacitor devices that work via charge shielding can be used to implement artificial neural networks and could potentially offer an energy efficiency of 29,600 tera-operations per second per watt. Data-intensive computing operations, such as training neural networks, are essential for applications in artificial intelligence but are energy intensive. One solution is to develop specialized hardware onto which neural networks can be directly mapped, and arrays of memristive devices can, for example, be trained to enable parallel multiply-accumulate operations. Here we show that memcapacitive devices that exploit the principle of charge shielding can offer a highly energy-efficient approach for implementing parallel multiply-accumulate operations. We fabricate a crossbar array of 156 microscale memcapacitor devices and use it to train a neural network that could distinguish the letters 'M', 'P' and 'I'. Modelling these arrays suggests that this approach could offer an energy efficiency of 29,600 tera-operations per second per watt, while ensuring high precision (6-8 bits). Simulations also show that the devices could potentially be scaled down to a lateral size of around 45 nm.
引用
收藏
页码:748 / 756
页数:9
相关论文
共 46 条
[1]   In-Memory Computing array using 40nm multibit SONOS achieving 100 TOPS/W energy efficiency for Deep Neural Network Edge Inference Accelerators [J].
Agrawal, Vineet ;
Prabhakar, V ;
Ramkumar, K. ;
Hinh, Long ;
Saha, Swatilekha ;
Samanta, Santanu ;
Kapre, Ravindra .
2020 IEEE INTERNATIONAL MEMORY WORKSHOP (IMW 2020), 2020, :107-110
[2]  
[Anonymous], 2011, POW ELECT IICPE 2010
[3]   The design and implementation of a low-power clock-powered microprocessor [J].
Athas, W ;
Tzartzanis, N ;
Mao, WH ;
Peterson, L ;
Lal, R ;
Chong, K ;
Moon, JS ;
Svensson, L ;
Bolotski, M .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2000, 35 (11) :1561-1570
[4]   Implementation of multilayer perceptron network with highly uniform passive memristive crossbar circuits [J].
Bayat, F. Merrikh ;
Prezioso, M. ;
Chakrabarti, B. ;
Nili, H. ;
Kataeva, I. ;
Strukov, D. .
NATURE COMMUNICATIONS, 2018, 9
[5]   LOGICAL REVERSIBILITY OF COMPUTATION [J].
BENNETT, CH .
IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1973, 17 (06) :525-532
[6]   Low-power linear computation using nonlinear ferroelectric tunnel junction memristors [J].
Berdan, Radu ;
Marukame, Takao ;
Ota, Kensuke ;
Yamaguchi, Marina ;
Saitoh, Masumi ;
Fujii, Shosuke ;
Deguchi, Jun ;
Nishi, Yoshifumi .
NATURE ELECTRONICS, 2020, 3 (05) :259-266
[7]   Analogue spin-orbit torque device for artificial-neural-network-based associative memory operation [J].
Borders, William A. ;
Akima, Hisanao ;
Fukami, Shunsuke ;
Moriya, Satoshi ;
Kurihara, Shouta ;
Horio, Yoshihiko ;
Sato, Shigeo ;
Ohno, Hideo .
APPLIED PHYSICS EXPRESS, 2017, 10 (01)
[8]   Experimental Demonstration and Tolerancing of a Large-Scale Neural Network (165 000 Synapses) Using Phase-Change Memory as the Synaptic Weight Element [J].
Burr, Geoffrey W. ;
Shelby, Robert M. ;
Sidler, Severin ;
di Nolfo, Carmelo ;
Jang, Junwoo ;
Boybat, Irem ;
Shenoy, Rohit S. ;
Narayanan, Pritish ;
Virwani, Kumar ;
Giacometti, Emanuele U. ;
Kuerdi, Bulent N. ;
Hwang, Hyunsang .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2015, 62 (11) :3498-3507
[9]   A fully integrated reprogrammable memristor-CMOS system for efficient multiply-accumulate operations [J].
Cai, Fuxi ;
Correll, Justin M. ;
Lee, Seung Hwan ;
Lim, Yong ;
Bothra, Vishishtha ;
Zhang, Zhengya ;
Flynn, Michael P. ;
Lu, Wei D. .
NATURE ELECTRONICS, 2019, 2 (07) :290-299
[10]   A novel simple CBCM method free from charge injection-induced errors [J].
Chang, YW ;
Chang, HW ;
Hsieh, CH ;
Lai, HC ;
Lu, TC ;
Ting, WC ;
Ku, J ;
Lu, CY .
IEEE ELECTRON DEVICE LETTERS, 2004, 25 (05) :262-264