High-Speed Communication System Development using FPGA based CAM Implementation

被引:0
作者
Banerjee, Tribeni Prasad [1 ]
Konar, Amit [2 ]
Chowdhury, Joydeb Roy [1 ]
机构
[1] Cent Mech Engn Res Inst, Durgapur 713209, W Bengal, India
[2] Jadavpur Univ, Dept Elect & Telecommun Engn, Kolkata, India
来源
2009 SECOND INTERNATIONAL CONFERENCE ON EMERGING TRENDS IN ENGINEERING AND TECHNOLOGY (ICETET 2009) | 2009年
关键词
Signal Processing; DSP; FPGA; ASIC; SoC; Data-Compression; CAM; Image and Video compression;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper we propose a Lossless data compressor in high level throughput using re programable FPGA technology.Real time data compression is expected to play a crucial role in high rate data communication applications. Most available approaches have largely overlooked the impact of mixed pixels and subpixel targets, which can be accurately modeled and uncovered by resorting to the wealth of spectral information provided by hyperspectral image data. In this paper, we proposed an FPGA -based data compressor on the concept of CAM and Dictionary based compression technique has been proposed in this paper. It has been implemented on a Xilinx Spartan3 -II FPGA formed by several millions of gates, and with high computational power and compact size, which make this reconfigurable device very appealing for onboard, real-time data processing.
引用
收藏
页码:252 / +
页数:3
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