A micropower learning vector quantizer for parallel analog-to-digital data compression

被引:0
作者
Lubkin, J [1 ]
Cauwenberghs, G [1 ]
机构
[1] Johns Hopkins Univ, Dept Elect & Comp Engn, Baltimore, MD 21218 USA
来源
ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6 | 1998年
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
An analog VLSI architecture for learning vector quantization (LVQ), with on-chip adaptation and dynamic storage of the analog templates, is presented. The architecture extends to Fuzzy ART and Kohonen self-organizing maps through digital programming. The analog memory and adaptive element of the LVQ cell comprise 6 MOS transistors and one capacitor, and provide for robust self-refresh of the dynamic analog storage. Total cell size including distance and adaptive computations is 80 x 70 lambda in scalable MOSIS technology. Experimental results from a fabricated 16 x 16 cell prototype in 2 mu m CMOS are included.
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页码:B58 / B61
页数:4
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