Profiling interrupt handler performance through kernel instrumentation

被引：5
|
作者：
Moore, B [1 ]
Slabach, T [1 ]
Schaelicke, L [1 ]
机构：
[1] Univ Notre Dame, Dept Comp Sci & Engn, Notre Dame, IN 46556 USA
来源：
21ST INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, PROCEEDINGS | 2003年
关键词：
D O I：
10.1109/ICCD.2003.1240889
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
As a result of technology trends towards multi-gigahertz processors, the I/O system is becoming a critical bottleneck for many applications. Interrupts are a major aspect of most device drivers. Characterizing interrupt performance and its relation to architectural trends is important for understanding and improving I/O subsystem performance. Kernel instrumentation in combination with performance counters is able to overcome the limitations of microbenchmarks when measuring interrupts. A comparative analysis of a range of IA-32 based systems reveals that interrupt handler code exhibits only a low degree of instruction-level parallelism. Consequently, the trend towards deeper processor pipelines and smaller caches to maximize clock frequency can be detrimental to interrupt handling performance.
引用
收藏
页码：156 / 163
页数：8
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