Integration of H2 barriers for ferroelectric memories based on SrBi2Ta2O9 (SBT)

In this study, integration of an hydrogen barrier into a FeRAM process flow is investigated. It is reported in the literature that ferroelectric properties can be maintained after hydrogen annealing by using IrOx as a top electrode [16][17][18]. Advantage of materials like IrOx is less catalytic activity compared to Pt. However, we found that IrOx is not a promising candidate for top electrode barrier. (Pt)/IrOx/SBT/Pt capacitors are prone to shorting or exhibit high leakage. IrOx films are very easily reduced by reducing ambient which will result in peeling off. Also, IrOx films tend to oxidize Ti or TiN layers immediately. Therefore, other barrier materials or layer sequences like Ir/IrOx have to be considered. For protection of the entire capacitor an Encapsulation Barrier Layer (EBL) is required. In this study, LPCVD SiN is used. LPCVD SiN is a standard material in CMOS technology. Production tools are available and it is well known as hydrogen barrier. By modifying the deposition process and using a novel process sequence, no visual damage of the capacitors after SiN-deposition and FGA is seen. Also, no degradation of electrical properties after capacitor formation as well as after SiN-deposition and FGA is observed. However, after metal 1 and metal 2 processing, 2P(r) values at 1.8V are reduced from 12 muC/cm(2) to 2 muC/cm(2). Polarization at 5.0V is not affected.