A 21 fJ/Conversion-Step 100 kS/s 10-bit ADC With a Low-Noise Time-Domain Comparator for Low-Power Sensor Interface

被引：148

作者：

Lee, Seon-Kyoo ^{[1
]}

Park, Seung-Jin ^{[1
]}

Park, Hong-June ^{[1
]}

Sim, Jae-Yoon ^{[1
]}

机构：

[1] Pohang Univ Sci & Technol POSTECH, Dept Elect & Elect Engn, Pohang 790784, Kyungbuk, South Korea

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2011年 / 46卷 / 03期

基金：

新加坡国家研究基金会;

关键词：

Analog-to-digital converter; comparator; successive approximation ADC; sensor interface; SAR ADC; CMOS;

D O I：

10.1109/JSSC.2010.2102590

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a 100 kS/s, 1.3 mu W, 9.3 ENOB successive approximation ADC with a time-domain comparator. The proposed time-domain comparator utilizes a differential multi-stage VCDL, resulting in a highly digital operation eliminating static power consumption. The effects of gain, noise, and offset are also investigated by detailed analysis which proves the feature of reducing the input-referred noise and offset by simply increasing the number of delay stages. For verification, the proposed ADC is fabricated in a 0.18 mu m CMOS. With a single supply voltage of 0.6 V, the ADC consumes 1.3 mu W at the maximum sampling rate of 100 kS/s. The measured ENOB is 9.3 b showing a figure of merit of 21 fJ/conversion-step.

引用

页码：651 / 659

页数：9

共 23 条

[1]

Agnes Andrea., 2008, Solid-State Circuits Conference, P246

[2]

Anderson T. O., 1972, Computer Design, V11, P81

[3] A 8-bit 500-KS/s low power SAR ADC for bio-medical applications [J].

Chang, You-Kuang ;

Wang, Chao-Shiun ;

Wang, Chorng-Kuang .

2007 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE, PROCEEDINGS OF TECHNICAL PAPERS, 2007, :228-+

[4] A Rail-to-Rail Input 12b 2 MS/s 0.18 μm CMOS Cyclic ADC for Touch Screen Applications [J].

Choi, Hee-Cheol ;

Ahn, Gil-Cho ;

Choi, Joong-Ho ;

Lee, Seung-Hoon .

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2009, 9 (03) :160-165

[5]

Chun-Cheng Liu, 2010, 2010 IEEE International Solid-State Circuits Conference (ISSCC), P386, DOI 10.1109/ISSCC.2010.5433970

[6]

Chun-Mei Liu, 2010, 2010 8th IEEE International Conference on Control and Automation (ICCA 2010), P241, DOI 10.1109/ICCA.2010.5524310

[7]

Craninckx J., 2007, IEEE ISSCC, P246

[8]

Giannini V., 2008, IEEE ISSCC, P238, DOI DOI 10.1109/ISSCC.2008.4523145

[9] 500-MS/s 5-bit ADC in 65-nm CMOS with split capacitor array DAC [J].

Ginsburg, Brian P. ;

Chandrakasan, Anantha P. .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2007, 42 (04) :739-747

[10]

Harpe Pieter, 2010, 2010 IEEE International Solid-State Circuits Conference (ISSCC), P388, DOI 10.1109/ISSCC.2010.5433967

← 1 2 3 →