The next generation of pixel chips will generate a large amount of data. In the envisaged application, the data has to be transported off chip via a micro twisted-pair cable. Because of the low bandwidth of the cable, equalization is needed. Pulse-Width Modulation turns out to be the best equalization method at the transmitter side. However, at 10Gb/s the eye-opening at the receiver side is very sensitive to the exact value of the pulse-width. This sensitivity can be significantly reduced by using an on-chip parallel RC combination in series with the transmitter. A demonstrator chip in 0.13 mu m CMOS has been designed to prove the concept.
