Blind equalization of time errors in a time-interleaved ADC system

被引:83
作者
Elbornsson, J [1 ]
Gustafsson, F
Eklund, JE
机构
[1] MathCore Engn AB, S-58330 Linkoping, Sweden
[2] Linkoping Univ, Dept Elect Engn, S-58183 Linkoping, Sweden
[3] Infineon Technol WS Sweden AB, S-58330 Linkoping, Sweden
关键词
A/D conversion; equalization; estimation; nonuni-form sampling;
D O I
10.1109/TSP.2005.843706
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
To significantly increase the sampling rate of an analog-to-digital converter (ADC), a time-interleaved ADC system is a good option. The drawback of a time-interleaved ADC system is that the ADCs are not exactly identical due to errors in the manufacturing process. This means that time; gain, and offset mismatch errors are introduced in the ADC system. These errors cause distortion in the sampled signal. In this paper, we present a method for estimation and compensation of the time mismatch errors. The estimation method requires no knowledge about the input signal, except that it should be band limited to the foldover frequency pi/T-s for the complete ADC system. This means that the errors can be estimated while the ADC is running. The method is also adaptive to slow changes in the time errors. The Cramer-Rao bound (CRB) for the time error estimates is also calculated and compared. to Monte Carlo simulations. The estimation method has also been validated on measurements from a real time-interleaved ADC system with 16 ADCs.
引用
收藏
页码:1413 / 1424
页数:12
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