Single-grain Si TFTs with ECR-PECVD gate SiO2

High-performance Si thin-film transistors (TFTs) are fabricated inside a single, location-controlled grain with gate SiO2 deposited by electron cyclotron resonance plasma enhanced chemical vapor deposition (ECR-PECVD). The position of the large grains is controlled by mu-Czocbralski (grain-filter) process with excimer-laser crystallization. Owing to the low interface trap density of ECR-PECVD SiO2 the single-grain Si TFTs showed a smaller subthreshold swing of 0.45 V/decade, in addition to a higher field-effect mobility for electrons of 460 cm(2)/VS than that with low-pressure chemical-vapor deposited (LPCVD) SiO2.