Single-grain Si TFTs with ECR-PECVD gate SiO2

被引：31
|
作者：
Ishihara, R [1 ]
Hiroshima, Y
Abe, D
van Dijk, BD
van der Wilt, PC
Higashi, S
Inoue, S
Shimoda, T
Metselaar, JW
Beenakker, CIM
机构：
[1] Delft Univ Technol, DIMES, EEMCS, NL-2628 CT Delft, Netherlands
[2] Seiko Epson Corp, Technol Platform Res Ctr, Nagano 3990293, Japan
来源：
IEEE TRANSACTIONS ON ELECTRON DEVICES | 2004年 / 51卷 / 03期
关键词：
crystal growth; dielectric materials; excimer lasers; location-control; poly-Si; thin-film transistors (TFTs);
D O I：
10.1109/TED.2004.823326
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
High-performance Si thin-film transistors (TFTs) are fabricated inside a single, location-controlled grain with gate SiO2 deposited by electron cyclotron resonance plasma enhanced chemical vapor deposition (ECR-PECVD). The position of the large grains is controlled by mu-Czocbralski (grain-filter) process with excimer-laser crystallization. Owing to the low interface trap density of ECR-PECVD SiO2 the single-grain Si TFTs showed a smaller subthreshold swing of 0.45 V/decade, in addition to a higher field-effect mobility for electrons of 460 cm(2)/VS than that with low-pressure chemical-vapor deposited (LPCVD) SiO2.
引用
收藏
页码：500 / 502
页数：3
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