CORDIC Iterations Based Architecture for Low Power and High Quality DCT

被引：0
|
作者：
Leavline, E. Jebamalar [1 ]
Megala, S. [1 ]
Singh, D. Asir Antony Gnana [2 ]
机构：
[1] Anna Univ, Bharathidasan Inst Technol, Dept ECE, Tiruchirappalli 24, Tamil Nadu, India
[2] Anna Univ, Bharathidasan Inst Technol, Dept CSE, Tiruchirappalli 24, Tamil Nadu, India
来源：
2014 INTERNATIONAL CONFERENCE ON RECENT TRENDS IN INFORMATION TECHNOLOGY (ICRTIT) | 2014年
关键词：
Coordinate rotation digital computer (CORDIC); Discrete Cosine Transform (DCT); Low power reconfigurable architecture;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
Discrete Cosine Transform (DCT) is widely used in image and video compression standards. This paper presents low-power co-ordinate rotation digital computer (CORDIC) based reconfigurable architecture for discrete cosine transform (DCT). All the computations in DCT are not equally important in generating the frequency domain output. Considering the important difference in the DCT coefficients the number of CORDIC iterations can be dynamically changed to reduce the power of consumption with improved image quality. The proposed CORDIC based 2D DCT architecture is simulated using Modelsim and the experimental results show that our reconfigurable DCT achieves power savings with improved image quality.
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页数：5
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