A 129.5-151.5GHz Fully Differential Power Amplifier in 65nm CMOS

被引:0
作者
Su, Guodong [1 ,2 ]
Wan, Cao [1 ]
Chen, Dirong [1 ,2 ]
Gao, Xianghong [1 ]
Sun, Lingling [1 ]
机构
[1] Hangzhou Dianzi Univ, Minist Educ, Key Lab RF Circuits & Syst, Hangzhou 310018, Zhejiang, Peoples R China
[2] Zhejiang Univ, Inst VLSI Design, Hangzhou 310027, Zhejiang, Peoples R China
来源
2019 IEEE MTT-S INTERNATIONAL WIRELESS SYMPOSIUM (IWS 2019) | 2019年
基金
中国国家自然科学基金;
关键词
D-band; CMOS; power amplifier; neutralized amplifier; cascode amplifier; OOK; PAE;
D O I
10.1109/ieee-iws.2019.8803888
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a 129.5-151.5GHz fully differential power amplifier in 65nm CMOS process. The power amplifier constitutes a two-stage neutralized amplifier and an one-stage cascode amplifier. The neutralized amplifier is employed to improve the gain and isolation of the power amplifier, and the cascode structure is mainly used to improve the output power. The post-layout simulation results show that PA realizes a small signal gain of 10.5dB at the frequency of 139GHz, and the 3dB bandwidth of 22GHz, with a saturated output power of 9dBm, and this power amplifier supports modulation of OOK signal with 20Gbps transmission rate.
引用
收藏
页数:3
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