An ultra-low power high-performance CMOS temperature sensor with an inaccuracy of-0.3 A°C/+0.1 A°C for aerospace applications

被引:13
作者
Prasad, Deepak [1 ]
Nath, Vijay [1 ]
机构
[1] Birla Inst Technol, Dept Elect & Commun Engn, Ranchi, Bihar, India
来源
MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS | 2018年 / 24卷 / 03期
关键词
Threshold voltage - Integrated circuit design - Electric power utilization - Aerospace applications - Integrated circuit manufacture - CMOS integrated circuits - Temperature;
D O I
10.1007/s00542-017-3564-9
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In the current paper, a new temperature sensor with improved temperature inaccuracy and with very low power consumption has been designed for avionic industry. The temperature sensor is specifically designed so that it possesses features like low power consumption, high sensitivity, and least possible inaccuracy. Sensitivity and performance analysis of the sensor has been done in the presence of parasitic. Analysis at each step with variations at different parameters has also been done to verify the robustness of the circuit. The temperature sensor utilizes the device characteristics with the threshold voltage. The temperature coefficient at 1 V power supply is quite low which makes it possible for the transistors to work in the sub-threshold region or cutoff region. A linear plot is exhibited in such region and to use this property of CMOS technology in the circuit design, it has opted here. The designed temperature sensor exhibited better results in terms of linearity, power consumption and error when compared to previously designed temperature sensors. The proposed temperature sensor covers an area of 24.8 mu m x 22.4 mu m and consumes power as low as 45 nW. A highly linear performance with an error of mere - 0.3 to + 0.1 A degrees C within the range of - 55 to + 155 A degrees C is reported. The temperature sensor has been tested at 1 V and the simulation has been carried out with the help of cadence analog design environment with UMC 90 nm technology.
引用
收藏
页码:1553 / 1563
页数:11
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