A Novel Low-Power Nonvolatile 8T1M SRAM Cell

被引:7
作者
Singh, Damyanti [1 ]
Gupta, Kirti [2 ]
Pandey, Neeta [1 ]
机构
[1] Delhi Technol Univ, Dept Elect & Commun Engn, Delhi 110042, India
[2] Bharati Vidyapeeths Coll Engn, Dept Elect & Commun Engn, Delhi 110063, India
关键词
Nonvolatile memory; Memristor; HRS; LRS; SRAM; nvSRAM; MEMRISTOR; MARGIN; DESIGN;
D O I
10.1007/s13369-021-06035-2
中图分类号
O [数理科学和化学]; P [天文学、地球科学]; Q [生物科学]; N [自然科学总论];
学科分类号
07 ; 0710 ; 09 ;
摘要
In Static Random Access Memory (SRAM) that is most ubiquitous of portable devices, the power consumption is a major concern. The emerging nonvolatile device-based SRAM designs have shown reduced power consumption by enabling power down mode without the loss of data. This paper presents a novel nonvolatile SRAM cell that employs eight transistors and a single TiO2 memristor as a nonvolatile device. The proposed 8T1M has low write power consumption, low store/restore energy and does not require reset phase. The performance of the proposed cell is compared with existing 8 T nvSRAM cells to demonstrate its versatility over others. The proposed cell shows 99.7% and 47% reductions in write '0' power consumption and store/restore energy, respectively, with respect to existing 8 T nvSRAM counterparts, while the corresponding improvement in write margins and average store/restore delay is 69% and 70%. The results at different power supply and technology nodes are also captured to validate the impeccable performance of the proposed cell.
引用
收藏
页码:3163 / 3179
页数:17
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