A compact model for flicker noise in MOS transistors for analog circuit design

被引：30

作者：

Arnaud, A ^{[1
]}

Galup-Montoro, C

机构：

[1] Univ Republica, Fac Ingn, IIE, GME, Montevideo, Uruguay

[2] Univ Fed Santa Catarina, Dept Engn Eletr, LCI, Florianopolis, SC, Brazil

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2003年 / 50卷 / 08期

关键词：

1/f noise; compact modeling; flicker noise; MOSFET; noise;

D O I：

10.1109/TED.2003.815143

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Designers need accurate models to estimate 1/f noise in MOS transistors as a function of their size, bias point, and technology. Conventional models present limitations; they usually do not consistently represent the series-parallel associations of transistors and may not provide adequate results for all the operating regions, particularly moderate inversion. In this brief, we present a consistent, physics-based, one-equation-all-regions model for flicker noise developed with the aid of a one-equation-all-regions do model of the MOS transistor.

引用

页码：1815 / 1818

页数：4

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