LAMCS: A leakage aware DVFS based mixed task set scheduler for multi-core processors

被引:4
作者
Digalwar, Mayuri [1 ]
Raveendran, Biju K. [1 ]
Mohan, Sudeept [1 ]
机构
[1] Birla Inst Technol & Sci, Dept Comp Sci & Informat Syst, Pilani, Rajasthan, India
关键词
Dynamic and static energy optimization; Real time scheduling; Multi-core processors; Procrastination scheduling; Leakage aware scheduling; Dynamic voltage and frequency scaling;
D O I
10.1016/j.suscom.2017.06.001
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper proposes Leakage Aware Multi-Core Scheduler (LAMCS), an energy efficient mixed task set dynamic voltage and frequency scaling scheduler for multi-core processors. LAMCS schedules mixed task set where hard and soft real-time tasks, co-exist. It takes care of all the deadline constraints of hard realtime tasks and response time constraints of soft real-time tasks. LAMCS achieves energy efficiency by considering static and dynamic energy consumptions. The static energy saving is achieved by shutting down the core(s) for a duration greater than a threshold whenever it is feasible.The dynamic energy saving is achieved by applying DVFS whenever possible. DVFS lengthens the execution intervals by decreasing the voltage and frequency of the core which may reduce the chances Of shutdown. This increases energy consumption because of other factors such as preemptions, cache flushes etc. LAMCS minimizes these factors using procrastination. The energy efficiency is achieved while satisfying all the scheduling constraints of mixed task set. It tries to achieve minimum response time for all the soft real-time tasks and meets all deadlines of hard real-time tasks. The experimental results with synthetically generated benchmark program suites show that the proposed energy efficient solution shows appreciable energy savings as compared to the existing solutions. (C) 2017 Elsevier Inc. All rights reserved.
引用
收藏
页码:63 / 81
页数:19
相关论文
共 37 条
[1]   Multiprocessor scheduling with few preemptions [J].
Andersson, Bjorn ;
Tovar, Eduardo .
12TH IEEE INTERNATIONAL CONFERENCE ON EMBEDDED AND REAL-TIME COMPUTING SYSTEMS AND APPLICATIONS, PROCEEDINGS, 2006, :322-+
[2]  
Awan M. A., 2017, P 23 EUR C REAL TIM, P92
[3]   Hybrid power management in real time embedded systems: an interplay of DVFS and DPM techniques [J].
Bhatti, Muhammad Khurram ;
Belleudy, Cecile ;
Auguin, Michel .
REAL-TIME SYSTEMS, 2011, 47 (02) :143-162
[4]   Effective Online Power Management with Adaptive Interplay of DVS and DPM for Embedded Real-time System [J].
Chen, Gang ;
Huang, Kai ;
Huang, Jia ;
Buckl, Christian ;
Knoll, Alois .
16TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD 2013), 2013, :881-889
[5]   Energy Optimization for Real-Time Multiprocessor System-on-Chip with Optimal DVFS and DPM Combination [J].
Chen, Gang ;
Huang, Kai ;
Knoll, Alois .
ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 2014, 13
[6]  
Chen J.J., 2006, P ACM SIGPLAN SIGBED
[7]  
Chen J. J., 2017, P 12 IEEE REAL TIM E, P408
[8]   Procrastination determination for periodic real-time tasks in leakage-aware dynamic voltage scaling systems [J].
Chen, Jian-Jia ;
Kuo, Tei-Wei .
IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN DIGEST OF TECHNICAL PAPERS, VOLS 1 AND 2, 2007, :289-294
[9]   Energy-efficient scheduling for real-time systems on dynamic voltage scaling (DVS) platforms [J].
Chen, Jian-Jia ;
Kuo, Chin-Fu .
13TH IEEE INTERNATIONAL CONFERENCE ON EMBEDDED AND REAL-TIME COMPUTING SYSTEMS AND APPLICATIONS, PROCEEDINGS, 2007, :28-+
[10]  
Da He, 2012, 2012 15th Euromicro Conference on Digital System Design (DSD 2012), P288, DOI 10.1109/DSD.2012.7