Thickness modulation effects of Al2O3 capping layers on device performance for the top-gate thin-film transistors using solution-processed poly(4-vinyl phenol)/Zn-Sn-O gate stacks

被引:1
作者
Kim, Kyeong-Ah [1 ]
Bak, Jun-Yong [1 ]
Yoon, Sung-Min [1 ]
Kim, Seong Jip [2 ]
Jeong, Sunho [2 ]
Choi, Youngmin [2 ]
Jung, Soon-Won [3 ]
机构
[1] Kyung Hee Univ, Dept Adv Mat Engn Informat & Elect, Yongin 446701, Gyeonggi Do, South Korea
[2] Korea Res Inst Chem Technol, Div Adv Mat, Taejon 305600, South Korea
[3] Elect & Telecommun Res Inst, Informat & Commun Core Technol Res Lab, Taejon 305700, South Korea
来源
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B | 2015年 / 33卷 / 03期
基金
新加坡国家研究基金会;
关键词
LOW-TEMPERATURE; BIAS STRESS; ZINC-OXIDE; SEMICONDUCTORS; DIELECTRICS;
D O I
10.1116/1.4916021
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Solution-processed Zn-Sn-O (ZTO) top-gate thin-film transistors with Al2O3/poly(4-vinyl phenol) (PVP) double-layered gate insulators (GI) were fabricated and characterized. ZTO active channel was formed by spin-coating method and activated at a temperature as low as 350 degrees C. The chemical damages for the PVP films, which were induced during the photolithography-based patterning process were effectively suppressed by the introduction of Al2O3 capping layer. This capping layer also played an important role in improving the drain current hysteretic behaviors caused by intrinsic properties of the PVP film by modulating the capacitance coupling in the double-layered GI. The carrier mobility, subthreshold swing, and on/off ratio were obtained as approximately 5.13 cm(2) V-1 s(-1), 0.36 V/dec, 7.03 x 10(6), respectively, with hysteresis-free characteristics when the thickness values of Al2O3 capping and PVP GI layers were designed to be 90 and 220 nm, respectively. (C) 2015 American Vacuum Society.
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页数:7
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