Strain relaxation in patterned strained silicon directly on insulator structures

被引:40
作者
Lei, RZ [1 ]
Tsai, W
Aberg, I
O'Reilly, TB
Hoyt, JL
Antoniadis, DA
Smith, HI
Paul, AJ
Green, ML
Li, J
Hull, R
机构
[1] Intel Corp, TMG External Programs, Santa Clara, CA 95054 USA
[2] MIT, Dept Elect Engn & Comp Sci, Cambridge, MA 02139 USA
[3] NIST, Gaithersburg, MD 20899 USA
[4] Univ Virginia, Dept Mat Sci & Engn, Charlottesville, VA 22904 USA
关键词
Electric insulators - Finite element method - Lithography - Nanostructured materials - Silicon - Ultraviolet spectroscopy;
D O I
10.1063/1.2149153
中图分类号
O59 [应用物理学];
学科分类号
摘要
Strain relaxation is studied in strained silicon directly on insulator (SSDOI) substrates patterned with nanoscale features. Using interference lithography, biaxially strained SSDOI substrates with 30 nm thick strained Si on insulator films were patterned into grating structures with 90 nm wide stripes, and arrays of 80 nm x 170 nm pillars. The strain profiles of these patterned structures were examined by ultraviolet Raman spectroscopy. Raman analysis of the SSDOI gratings indicates strain relaxation in the 90 nm wide stripes, compared to the strain measured in unpatterned portions of the SSDOI wafer. Three-dimensional finite-element modeling of the stress distributions in the grading structures predicts that 95% of the strain is maintained in the direction along the length of the stripes. These simulations are used to decouple the strain components along the width and length of the SSDOI grating structure, inferred from Raman measurements. The results are consistent with substantial stress relaxation across the width of the stripes and very little stress relaxation along the length of the stripes. (c) 2005 American Institute of Physics.
引用
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页码:1 / 3
页数:3
相关论文
共 13 条
[1]  
Åberg I, 2004, 2004 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, P52
[2]  
*ANSYS INC, ANSYS 7 1
[3]  
CARDONA M, 1987, P SOC PHOTO-OPT INS, V822, P77
[4]   RAMAN INVESTIGATIONS OF ELASTIC STRAIN RELIEF IN SI1-XGEX LAYERS ON PATTERNED SILICON SUBSTRATE [J].
DIETRICH, B ;
BUGIEL, E ;
OSTEN, HJ ;
ZAUMSEIL, P .
JOURNAL OF APPLIED PHYSICS, 1993, 74 (12) :7223-7227
[5]   Fabrication of ultra-thin strained silicon on insulator [J].
Drake, TS ;
Ní Chléirigh, C ;
Lee, ML ;
Pitera, AJ ;
Fitzgerald, EA ;
Antoniadis, DA ;
Anjum, DH ;
Li, J ;
Hull, R ;
Klymko, N ;
Hoyt, JL .
JOURNAL OF ELECTRONIC MATERIALS, 2003, 32 (09) :972-975
[6]  
He J., 1998, International Journal of Microcircuits and Electronic Packaging, V21, P297
[7]  
Irisawa T, 2005, 2005 Symposium on VLSI Technology, Digest of Technical Papers, P178
[8]   Strained Si, SiGe, and Ge channels for high-mobility metal-oxide-semiconductor field-effect transistors [J].
Lee, ML ;
Fitzgerald, EA ;
Bulsara, MT ;
Currie, MT ;
Lochtefeld, A .
JOURNAL OF APPLIED PHYSICS, 2005, 97 (01)
[9]   CHARACTERIZATION OF SEMICONDUCTOR-MATERIALS BY RAMAN MICROPROBE [J].
NAKASHIMA, S ;
HANGYO, M .
IEEE JOURNAL OF QUANTUM ELECTRONICS, 1989, 25 (05) :965-975
[10]   Generalized scanning beam interference lithography system for patterning gratings with variable period progressions [J].
Pati, GS ;
Heilmann, RK ;
Konkola, PT ;
Joo, C ;
Chen, CG ;
Murphy, E ;
Schattenburg, ML .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 2002, 20 (06) :2617-2621