FPGA implementation of fixed and variable frequency ADALINE schemes for grid-connected VSI synchronization

被引:0
|
作者
Cardenas, Alben [1 ]
Guzman, Cristina [1 ]
Agbossou, Kodjo [1 ]
机构
[1] UQTR, IRH, Trois Rivieres, PQ, Canada
来源
2011 IEEE INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS (ISIE) | 2011年
关键词
Voltage Source Inverter; Power Quality; Power Control; FPGA; ADALINE; LOCKED LOOP SYSTEM; POWER; TRACKING; HARMONICS; FILTER;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Grid-connected Voltage Source Inverter (VSI) are essentials to integrate the Distributed Energy Resources (DER) with the utility power systems. This integration allows the increasing of the reliability and the efficiency of power systems. However, the massive utilization of VSI can generates problems into the power quality indices of power systems, especially if the power control algorithm has a poor synchronization. Therefore, a good synchronization of power control algorithm helps to keep acceptable power quality indices. This paper presents the FPGA implementation of synchronization and power control of VSI using a variable frequency ADALINE structure. The proposed ADALINE implementation is used for amplitude, frequency and phase detection of the fundamental utility voltage and its harmonics. Fundamental signal information is then employed for the synchronization and power control scheme. The fundamental and harmonics information is employed to evaluate the power flow and the power quality of VSI output current. This evaluation is very useful for power quality problems mitigation. Experimental results, using low power VSI and Xilinx FPGA system, demonstrate the validity of proposition.
引用
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页数:8
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