High RF performance of 50-nm-gate lattice-matched InAlAs/InGaAs HEMTs

被引:0
作者
Endoh, A [1 ]
Yamashita, Y
Higashiwaki, M
Hikosaka, K
Mimura, T
Hiyamizu, S
Matsui, A
机构
[1] Fujitsu Ltd, Atsugi, Kanagawa 2430197, Japan
[2] Osaka Univ, Grad Sch Engn Sci, Toyonaka, Osaka 5608531, Japan
[3] Commun Res Labs, Koganei, Tokyo 1840015, Japan
关键词
InAlAs/InGaAs; InP; HEMT; cutoff frequency; low-temperature fabrication process;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We fabricated 50-nm-gate InAlAs/InGaAs high electron mobility transistors (HEMTs) lattice-matched to InP substrates by using a conventional process under low temperatures, below 300 degreesC, to prevent fluorine contamination and suppress possible diffusion of the Si-delta -doped sheet in the electron-supply layer, and measured the DC and RF performance of the transistors. The DC measurement showed that the maximum transconductance g(m) of a 50-nm-gate HEMT is about 0.91 S/mm. The cutoff frequency f(T) of our 50-nm-gate HEMT is 362 GHz, which is much higher than the values reported for previous 50-nm-gate lattice-matched HEMTs. The excellent RF performance of our HEMTs results from a shortening of the lateral extended range of charge control by the drain field, and this may have been achieved because the low-temperature fabrication process suppressed degradation of epitaxial structure.
引用
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页码:1328 / 1334
页数:7
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