Digitally Assisted Mixed-Signal Circuit Security

被引:8
作者
Leonhard, Julian [1 ]
Limaye, Nimisha [2 ]
Turk, Shadi [3 ]
Sayed, Alhassan [1 ,4 ]
Rizo, Alan Rodrigo Diaz [1 ]
Aboushady, Hassan [1 ]
Sinanoglu, Ozgur [5 ]
Stratigopoulos, Haralampos-G. [1 ]
机构
[1] Sorbonne Univ, CNRS, LIP6, F-75005 Paris, France
[2] New York Univ, Tandon Sch Engn, Dept Elect & Comp Engn, Brooklyn, NY 11201 USA
[3] Seamless Waves, F-75020 Paris, France
[4] Minia Univ, Elect & Commun Dept, Al Minya 61519, Egypt
[5] New York Univ Abu Dhabi, Div Engn, Abu Dhabi, U Arab Emirates
关键词
Hardware security and trust; IP/IC piracy; locking; mixed-signal integrated circuits (ICs); INTEGRATED-CIRCUITS; ANALOG;
D O I
10.1109/TCAD.2021.3111550
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The design and manufacturing steps of a chip typically involve several parties. For example, a chip may comprise several third-party intellectual property (IP) cores and the integrated circuit (IC) fabrication may be outsourced to a third-party foundry. IP cores and ICs are shared with potentially untrusted third parties and, as a result, are subject to piracy attacks. Even more, any legally purchased chip may be reverse engineered to retrieve the design down to transistor level and, thereby, it is also subject to piracy attacks. In this article, we propose MixLock, an anti-piracy countermeasure for mixed-signal IP cores and ICs. MixLock protection is based on inserting a lock mechanism into the design such that correct functionality is established only after applying a key which is the designer's secret. The lock mechanism acts on the mixed-signal performances by leveraging logic locking of the digital part. MixLock presents several key attributes. It is generally applicable, it is nonintrusive to the sensitive analog section, it incurs no performance penalty and has very low area and power overheads, it is fully automated, and it is capable of co-optimizing security in both the analog and digital domains. We demonstrate MixLock on Sigma Delta analog-to-digital converter (ADC) using hardware measurements and an audio demonstrator.
引用
收藏
页码:2449 / 2462
页数:14
相关论文
共 38 条
  • [1] Acharya RY, 2020, PROCEEDINGS OF THE 2020 IEEE INTERNATIONAL SYMPOSIUM ON HARDWARE ORIENTED SECURITY AND TRUST (HOST), P284, DOI [10.1109/host45689.2020.9300277, 10.1109/HOST45689.2020.9300277]
  • [2] How Multi-threshold Designs Can Protect Analog IPs
    Ash-Saki, Abdullah
    Ghosh, Swaroop
    [J]. 2018 IEEE 36TH INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD), 2018, : 464 - 471
  • [3] Beyond the Interconnections: Split Manufacturing in RF Designs
    Bi, Yu
    Yuan, Jiann S.
    Jin, Yier
    [J]. ELECTRONICS, 2015, 4 (03): : 541 - 564
  • [4] Keynote: A Disquisition on Logic Locking
    Chakraborty, Abhishek
    Jayasankaran, Nithyashankari Gummidipoondi
    Liu, Yuntao
    Rajendran, Jeyavijayan
    Sinanoglu, Ozgur
    Srivastava, Ankur
    Xie, Yang
    Yasin, Muhammad
    Zuzak, Michael
    [J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 39 (10) : 1952 - 1972
  • [5] Chakraborty P, 2018, PROCEEDINGS OF THE 2018 ASIAN HARDWARE ORIENTED SECURITY AND TRUST SYMPOSIUM (ASIANHOST), P56, DOI 10.1109/AsianHOST.2018.8607163
  • [6] Elshamy M, 2020, DES AUT TEST EUROPE, P61, DOI [10.23919/DATE48585.2020.9116520, 10.23919/date48585.2020.9116520]
  • [7] Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain
    Guin, Ujjwal
    Huang, Ke
    DiMase, Daniel
    Carulli, John M., Jr.
    Tehranipoor, Mohammad
    Makris, Yiorgos
    [J]. PROCEEDINGS OF THE IEEE, 2014, 102 (08) : 1207 - 1228
  • [8] Towards Secure Analog Designs: A Secure Sense Amplifier Using Memristors
    Hoe, David H. K.
    Rajendran, Jeyavijayan
    Karri, Ramesh
    [J]. 2014 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI), 2014, : 517 - 522
  • [9] Towards Provably-Secure Analog and Mixed-Signal Locking Against Overproduction
    Jayasankaran, N. G.
    Borbon, A. Sanabria
    Sanchez-Sinencio, E.
    Hu, J.
    Rajendran, J.
    [J]. IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING, 2022, 10 (01) : 386 - 403
  • [10] Breaking Analog Locking Techniques
    Jayasankaran, Nithyashankari Gummidipoondi
    Sanabria-Borbon, Adriana
    Abuellil, Amr
    Sanchez-Sinencio, Edgar
    Hu, Jiang
    Rajendran, Jeyavijayan
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2020, 28 (10) : 2157 - 2170