A High Linearity Low Noise Integrated UHF RFID Reader Receiver Front-end

A high linearity and low noise integrated Ultra High Frequency Radio Frequency Identification (UHF RFID) reader receiver front-end, which operates from 860 MHz to 960 MHz and supports the EPCglobal (TM) Class-1 Generation-2 and ISO-18000-6B/C standards, is presented in this paper. In this design, an I/Q Zero-IF direct-conversion circuit is used to suppress the leakage signal from transmitter to receiver and meet the needs for NSB/PR-ASK and PSK modulation. The proposed receiver front-end consists of a switched gain controlled low noise amplifier (SGCLNA), a quadrature down-conversion mixer and a constant bias circuit. The simulation is made by Cadence Spectre in CHRT 0.18 mu m mixed signal/RF process. The results show that the front-end delivers about 25 dB gain with 5.29 dB noise figure (NF) at 1 MHz IF, and the third-order input intercept point (IIP3) of 3.37 dBm and sensitivity of -97.5 dBm in the listen mode. In the talk mode, the gain is about 17.5 dB and NF at 1 MHz IF is 9.8 dB, the IIP3 is 8.78 dBm and the sensitivity is -94 dBm. It occupies a chip area of 1.5 mm(2) and dissipates 14 mW from a 1.8 V supply voltage.