A 100-GS/s Four-to-One Analog Time Interleaver in 55-nm SiGe BiCMOS

被引：9

作者：

Ramon, Hannes ^{[1
,2
]}

Verplaetse, Michiel ^{[1
,2
]}

Vanhoecke, Michael ^{[1
,2
]}

Li, Haolin ^{[1
,2
]}

Bauwelinck, Johan ^{[1
,2
]}

Ossieur, Peter ^{[1
,2
]}

Yin, Xin ^{[1
,2
]}

Torfs, Guy ^{[1
,2
]}

机构：

[1] Univ Ghent, IDLab, Dept Informat Technol, B-9000 Ghent, Belgium

[2] IMEC, B-3001 Leuven, Belgium

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2021年 / 56卷 / 08期

基金：

欧盟地平线“2020”;

关键词：

Clocks; Bandwidth; BiCMOS integrated circuits; Silicon germanium; Mixers; Gain; Equalizers; 100; GS; s; BiCMOS; digital-to-analog; equalizer; interleaver; return-to-zero (RZ); DAC; TRANSMITTER; CONVERTERS; FREQUENCY; ADCS;

D O I：

10.1109/JSSC.2021.3057575

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We demonstrate a four-to-one 100-GS/s time interleaver realized in a 55-nm BiCMOS technology. The interleaver comprises two stages of two-to-one sub-interleavers. Each sub-interleaver is implemented using a return-to-zero generation and summing architecture. This sub-interleaver architecture ensures lower clock feedthrough and contains an inherent feed-forward equalizer. Effective number of bits (ENOB) measurements have been performed revealing the interleaver's ENOB of 4.9 at 3 GHz. In addition, the transfer function is measured to show the capabilities of the inherent feed-forward equalizer of the sub-interleavers. The measured analog output bandwidth of the four-to-one interleaver is 73 GHz. Finally, a 100-GBd PAM-4 (200 Gb/s) signal is generated by interleaving four 25-GBd PAM-4 streams while consuming 700 mW.

引用

页码：2539 / 2549

页数：11

共 21 条

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