SiC-based analytical model for gate-stack dual metal nanowire FET with enhanced analog performance

In this paper, silicon carbide-based analytical model for gate-stack dual metal nanowire field effect transistor (gate-stack DM NW FET) has been analyzed by solving the 2D Poisson's equation using parabolic approximation method for electric potential, subthreshold current and subthreshold slope. The results have been examined for various silicon carbide film depth and channel length. The results predicted by the analytical model have excellent agreement with simulated results obtained by ATLAS 3D device simulator. A gate-stack having high k-dielectric material, that is, Hafnium oxide (HfO2) along with aluminum oxide (Al2O3) has been used. Also, performance characteristics of gate-stack DM NW FET have been compared with the performance characteristics of nanowire field effect transistor (NW FET), Nanowire field effect transistor (NW FET) (Sic) and dual metal nanowire field effect transistor (DM NW FET) (SiC). It is so proved that our proposed device, that is, gate-stack DM NW FET (4H-SiC) exhibits superior performance in terms of drain current (I-ds), transconductance (g(m)), output conductance (g(d)) and cut off frequency (f(T)) than the existing devices.