A high-frequency phase-compensation fractional-N frequency synthesizer

被引:0
|
作者
Yang, CY [1 ]
Chen, JW [1 ]
Tsai, MT [1 ]
机构
[1] Natl Chung Hsing Univ, Dept Elect Engn, Taichung 40227, Taiwan
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a new type of high-frequency fractional-N frequency divider with a phase compensation technique is developed, which can operate for the frequency ranging from 1 GHz to 2.5 GHz, and achieve the divide ratio of (256 similar to 271) + (f / 16). The on-chip phase compensation by a delay-locked loop (DLL) is adopted to reduce the fractional spurs in the fractional-N frequency synthesizer. The fractional-N synthesizer is simulated with using a 0.35- mu m standard CMOS technology and the power dissipation is about 70 mW under the supply voltage of 3.3 V.
引用
收藏
页码:5091 / 5094
页数:4
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