An Energy-Efficient 13-bit Zero-Crossing ΔΣ Capacitance-to-Digital Converter with 1 pF-to-10 nF Sensing Range

被引:0
作者
Li, Bing [1 ]
Li, Chuang [1 ]
Wang, Wei [1 ]
Liu, Jia [1 ]
Liu, Wen-Jun [1 ]
Yang, Qian [1 ]
Ye, Wen-Bin [1 ]
机构
[1] Shenzhen Univ, Coll Elect Sci & Technol, Shenzhen, Peoples R China
来源
2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2018年
基金
中国国家自然科学基金;
关键词
capacitance-to-digital converter; oversampled Delta Sigma modulation; zero-crossing-based circuits; CHAIN;
D O I
10.1109/ISCAS.2018.8351703
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Conventional capacitance-to-digital converters (CDCs) suffer limitations either on narrow capacitance range or low resolution for jitter-induced noise and high power consumption. In order to overcome these limitations, a 13-bit 1 pF-to-10 nF generic CDC is presented. In the proposed CDC with the oversampled Delta Sigma modulation, the zero-crossing-based circuits (ZCBCs) are used to replace the operational transconductance amplifier to avoid feedback loop stability issues. However, the ZCBCs inevitably incur the non-idealities and thus a novel calibration scheme is presented for efficient non-ideality-error cancellation. A prototype fabricated using 0.18 mu m CMOS technology is experimentally verified using a MEMS capacitive humidity sensor. The measurement results show the CDC achieves a 13-bit rms noise equivalent resolution with a 128 mu s conversion time and a 230 fJ/conversion-step figure of merit. The calibration scheme enhances the linearity from 7 bits to 11.4 bits in the 1 pF-to-10 nF compatible capacitance range.
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页数:5
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