A 3.6 μs Latency Asynchronous Frame-Free Event-Driven Dynamic-Vision-Sensor

被引:158
作者
Antonio Lenero-Bardallo, Juan [1 ]
Serrano-Gotarredona, Teresa [1 ]
Linares-Barranco, Bernabe [1 ]
机构
[1] Inst Microelect Sevilla, Seville 41092, Spain
关键词
Address-event-representation; AER; asynchronous vision sensor; CMOS pixel; dynamic vision sensor; high-speed vision sensor; temporal contrast; OPTIC-NERVE SIGNALS; CONTRAST; CHIP; RETINA; PROCESSOR; VOLTAGE; 128X128; GOPS;
D O I
10.1109/JSSC.2011.2118490
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a 128 x 128 dynamic vision sensor. Each pixel detects temporal changes in the local illumination. A minimum illumination temporal contrast of 10% can be detected. A compact preamplification stage has been introduced that allows to improve the minimum detectable contrast over previous designs, while at the same time reducing the pixel area by 1/3. The pixel responds to illumination changes in less than 3.6 mu s. The ability of the sensor to capture very fast moving objects, rotating at 10 K revolutions per second, has been verified experimentally. A frame-based sensor capable to achieve this, would require at least 100 K frames per second.
引用
收藏
页码:1443 / 1455
页数:13
相关论文
共 40 条
[1]   Xetal-II: A 107 GOPS, 600 mW massively parallel processor for video scene analysis [J].
Abbo, Anteneh A. ;
Kleihorst, Richard P. ;
Choudhary, Vishal ;
Sevat, Leo ;
Wielage, Paul ;
Mouy, Sebastien ;
Vermeulen, Bart ;
Heijligers, Marc .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2008, 43 (01) :192-201
[2]   A Five-Decade Dynamic-Range Ambient-Light-Independent Calibrated Signed-Spatial-Contrast AER Retina With 0.1-ms Latency and Optional Time-to-First-Spike Mode [J].
Antonio Lenero-Bardallo, Juan ;
Serrano-Gotarredona, Teresa ;
Linares-Barranco, Bernabe .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2010, 57 (10) :2632-2643
[3]   Motion vision sensor architecture with asynchronous self-signaling pixels [J].
AriasEstrada, M ;
Poussart, D ;
Tremblay, M .
CAMP'97 - FOURTH IEEE INTERNATIONAL WORKSHOP ON COMPUTER ARCHITECTURE FOR MACHINE PERCEPTION, PROCEEDINGS, 1997, :75-83
[4]  
AZADMEHR M, 2005, P IEEE INT S CIRC SY, V3, P2751
[5]   A 100 x 100 pixel silicon retina for gradient extraction with steering filter capabilities and temporal output coding [J].
Barbaro, M ;
Burgi, PY ;
Mortara, A ;
Nussbaum, P ;
Heitger, F .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2002, 37 (02) :160-172
[6]  
BOAHEN KA, 1992, ADV NEUR IN, V4, P764
[7]   Point-to-point connectivity between neuromorphic chips using address events [J].
Boahen, KA .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2000, 47 (05) :416-434
[8]   Arbitrated time-to-first spike CMOS image sensor with on-chip histogram equalization [J].
Chen Shoushun ;
Bermak, Amine .
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2007, 15 (03) :346-357
[9]  
CHI YM, 2008, IEEE J SOLID-ST CIRC, V43, P2187
[10]   A spatial contrast retina with on-chip calibration for neuromorphic spike-based AER vision systems [J].
Costas-Santos, Jesus ;
Serrano-Gotarredona, Teresa ;
Serrano-Gotarredona, Rafael ;
Linares-Barranco, Bernabe .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2007, 54 (07) :1444-1458