A 5.9-GHz voltage-controlled ring oscillator in 0.18-μm CMOS

被引:164
作者
Eken, YA [1 ]
Uyemura, JP [1 ]
机构
[1] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA
关键词
CMOS; LC oscillators; multiple-pass architecture; phase-locked loop (PLL); phase noise; ring oscillators; VLSI; voltage-controlled oscillators (VCOs);
D O I
10.1109/JSSC.2003.820869
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents the design of three- and nine-stage voltage-controlled ring oscillators that were fabricated in TSMC 0.18-mum CMOS technology with oscillation,frequencies up to 5.9 GHz. The circuits use a multiple-pass loop architecture and delay stages with cross-coupled FETs to aid in the switching speed and to improve the noise parameters. Measurements show that the oscillators have linear frequency-voltage characteristics over a wide tuning range, with the three- and nine-stage rings resulting in frequency ranges of 5.16-5.93 GHz and 1.1-1.86 GHz, respectively. The measured phase noise of the mine-stage ring oscillator was -105.5 dBc/Hz at a 1-MHz offset from a 1.81-GHz center frequency, whereas the value for the three-stage ring oscillator was simulated to be -99.5 dBc/Hz at a 1-MHz offset from a 5.79-GHz center frequency.
引用
收藏
页码:230 / 233
页数:4
相关论文
共 10 条
[1]   Design of low-phase-noise CMOS ring oscillators [J].
Dai, L ;
Harjani, R .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 2002, 49 (05) :328-338
[2]  
HWANG IC, 2002, IEEE INT SOL STAT CI, P140
[3]   CMOS current-controlled oscillators using multiple-feedback-loop ring architectures [J].
Jeong, DY ;
Chai, SH ;
Song, WC ;
Cho, GH .
1997 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE - DIGEST OF TECHNICAL PAPERS, 1997, 40 :386-387
[4]  
Lee SJ, 1997, IEEE J SOLID-ST CIRC, V32, P289, DOI 10.1109/4.551926
[5]  
MANEATIS J, 1995, Patent No. 5475344
[6]   PRECISE DELAY GENERATION USING COUPLED OSCILLATORS [J].
MANEATIS, JG ;
HOROWITZ, MA .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1993, 28 (12) :1273-1282
[7]   A low-noise, 900-MHz VCO in 0.6-μm CMOS [J].
Park, CH ;
Kim, B .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (05) :586-591
[8]   Study of phase noise in CMOS oscillators [J].
Razavi, B .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (03) :331-343
[9]  
Sugimoto Y, 1997, ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV, P269, DOI 10.1109/ISCAS.1997.608698
[10]  
Sun LZ, 1999, ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2, P176, DOI 10.1109/ISCAS.1999.780647