Formation and Evaluation of Electroless-Plated Barrier Films for High-Aspect-Ratio Through-Si Vias

被引:6
作者
Miyake, Hiroshi [1 ]
Inoue, Fumihiro [1 ]
Yokoyama, Takumi [1 ]
Shimizu, Tomohiro [1 ]
Tanaka, Shukichi [2 ]
Terui, Toshifumi [2 ]
Shingubara, Shoso [1 ]
机构
[1] Kansai Univ, Grad Sch Sci & Engn, Osaka 5648680, Japan
[2] Kobe Adv Res Ctr, Natl Inst Informat & Commun Technol, Kobe, Hyogo 6512492, Japan
基金
日本学术振兴会;
关键词
SELF-ASSEMBLED-MONOLAYER; 3-DIMENSIONAL CHIP STACKING; BOTTOM-UP FILL; CU SEED LAYER; COPPER; DEPOSITION; FABRICATION; HOLES; ELECTRODEPOSITION; METAL;
D O I
10.1143/JJAP.50.05ED01
中图分类号
O59 [应用物理学];
学科分类号
摘要
The formation of a diffusion barrier layer in a through-Si via (TSV) has been studied with a combination of nanoparticle catalyst and electroless plating (ELP). We used Au-nanoparticles (Au-NPs) or Pd-nanoparticles (Pd-NPs) as catalysts for ELP of Ni- and Co-alloy barrier layers. We studied deposition of Ni-B and Co-B films in high-aspect-ratio (AR) TSV. Then, we succeeded in controlling the deposition profile of Ni- B in a high-AR TSV by the addition of bis(3-sulfopropyl)-disulfide (SPS). SPS turned out to be an inhibitor of electroless plating of Ni-B. On the other hand, the Co-B film was deposited conformally without additive. The electrical resistivity of Cu after annealing Cu/barrier stacked structure suggests that Co-B has better thermal stability than Ni-B. (C) 2011 The Japan Society of Applied Physics
引用
收藏
页数:5
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