Energy-Efficient 360-Degree Video Rendering on FPGA via Algorithm-Architecture Co-Design

360 degrees panoramic video provides an immersive Virtual Reality experience. However, rendering 360 degrees videos consumes excessive energy on client devices. FPGA is an ideal offloading target to improve the energy-efficiency. However, a naive implementation of the processing algorithm would lead to an excessive memory footprint that offsets the energy benefit. In this paper, we propose an algorithm-architecture co-designed system that dramatically reduces the onchip memory requirement of VR video processing to enable FPGA offloading. Evaluation shows that our system is able to achieve significant energy reduction with no loss of performance compared to today's off-the-shelf VR video rendering system.