A VLIW-Based Post Compilation Framework for Multimedia Embedded DSPs with Hardware Specific Optimizations

被引：0

作者：

Cheng, Meng-Hsuan ^{[1
]}

Slagter, Kenn ^{[1
]}

Lung, Tai-Wen ^{[1
]}

Chung, Yeh-Ching ^{[1
]}

机构：

[1] Natl Tsing Hua Univ, Dept Comp Sci, Syst Software Lab, Hsinchu 30013, Taiwan

来源：

METHODS AND TOOLS OF PARALLEL PROGRAMMING MULTICOMPUTERS | 2010年 / 6083卷

关键词：

VLIW Compiler optimization; DSP Compiler optimization; Post optimization;

D O I：

暂无

中图分类号：

TP31 [计算机软件];

学科分类号：

081202 ; 0835 ;

摘要：

In high performance and low power multimedia embedded system design, VLIW-based embedded DSPs compilers that exploit ILP have become popular and play an important role today. For this reason, we need optimizing embedded DSP compilers that can both generate capable and efficient code in terms of performance, power, size, and productivity. In this paper, we show a post-compilation framework that can further optimize programs that have already been compiled and optimized by another compiler, by using runtime information and exploiting hardware specific features a DSPs. Finally, we show in our simulation results, that even programs compiled at the best optimization level, can obtain significant improvement through the use of this framework.

引用

页码：51 / 58

页数：8