A 256-point Analog Discrete-Time FFT

被引：0
|
作者：
Kleine, Kaleb [1 ]
Reed, Jeffrey H. [1 ]
Michaels, Alan J. [1 ]
机构：
[1] Virginia Tech, Bradley Dept Elect & Comp Engn, Blacksburg, VA 24061 USA
来源：
2020 IEEE 63RD INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS) | 2020年
关键词：
analog; discrete-time; Fast Fourier Transform; FFT; DECODER;
D O I：
10.1109/mwscas48704.2020.9184511
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
In support of future multi-carrier waveforms, this paper presents the design and simulation of a differential complex-valued 256-point analog discrete-time Fast Fourier Transform (FFT). A four-stage radix-4 decimation-in-time architecture was used, allowing the structure to be scaled to FFT sizes with thousands of points. Being high speed and having a large bin count makes this FFT a practical front end receiver component for waveforms that rely on the FFT, such as Orthogonal Frequency Division Multiplexing (OFDM) and future 5G waveforms like cyclic prefix OFDM (CP-OFDM). The FFT architecture was simulated using IBM's 32nm Silicon-on-Insulator (SOI) process, and the results are compared to other published analog discrete-time FFTs.
引用
收藏
页码：966 / 969
页数：4
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