An Image Filter System based on dynamic partial reconfiguration on FPGA

In this paper, we describe a filter system on FPGA for stream image processing. By the dynamic partial reconfiguration, any new filters can be reconfigured on the FPGA on demand. However, the simple reconfiguration of a new filter may disturb the output stream, because it is not guaranteed that the filter works as designed during its reconfiguration. In our approach, the system consists of two parts; N filters and two networks to connect them. By limiting the number of the active filters to N - 1, and using one of the networks in turn, any combination of the filters can be realized without disturbing the output stream.