Unified Compact Model of Soft Breakdown Oxide Degradation and Its Impact on CMOS Circuits Reliability

被引:3
|
作者
Gerrer, Louis [1 ]
Ghibaudo, Gerard [1 ]
Rafik, Mustapha [2 ]
机构
[1] IMEP LAHC Minatec, F-38016 Grenoble, France
[2] STMicroelectronics, Reliabil Dept, F-38926 Crolles, France
关键词
Breakdown evolution; channel debiasing; current partitioning methodology; dielectric breakdown; GATE OXIDE;
D O I
10.1109/TDMR.2011.2181174
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Oxide breakdown (BD) modeling may allow important reliability margin extension since the BD has been shown to be not immediately destructive for circuit operation. BD characterization and understanding are strongly required to implement relevant models, reproducing all BD parameter deviations. Owing to damaged device characterization, we extract empirical laws of BD impact evolution and implement them in the first BD damaged compact model. Parameter variability correlation is explained through measurements and simulations, particularly threshold voltage deviation due to BD. Using our original compact model, we investigate BD impacts on circuit functioning, showing original effects and several improvements of previous studies. Inverter threshold, power consumption increase, BD path location impact, and SRAM cell SNM reduction are examined, demonstrating the ability of our compact model to estimate circuit lifetime extension, including circuit parameter deviations.
引用
收藏
页码:171 / 176
页数:6
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