A Flexible Parallel Hardware Architecture for AdaBoost-Based Real-Time Object Detection

被引:50
作者
Kyrkou, Christos [1 ]
Theocharides, Theocharis [1 ]
机构
[1] Univ Cyprus, Dept Elect & Comp Engn, CY-1678 Nicosia, Cyprus
关键词
Object detection; systolic arrays; VLSI;
D O I
10.1109/TVLSI.2010.2048224
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Real-time object detection is becoming necessary for a wide number of applications related to computer vision and image processing, security, bioinformatics, and several other areas. Existing software implementations of object detection algorithms are constrained in small-sized images and rely on favorable conditions in the image frame to achieve real-time detection frame rates. Efforts to design hardware architectures have yielded encouraging results, yet are mostly directed towards a single application, targeting specific operating environments. Consequently, there is a need for hardware architectures capable of detecting several objects in large image frames, and which can be used under several object detection scenarios. In this work, we present a generic, flexible parallel architecture, which is suitable for all ranges of object detection applications and image sizes. The architecture implements the AdaBoost-based detection algorithm, which is considered one of the most efficient object detection algorithms. Through both field-programmable gate array emulation and large-scale implementation, and register transfer level synthesis and simulation, we illustrate that the architecture can detect objects in large images (up to 1024 x 768 pixels) with frame rates that can vary between 64-139 fps for various applications and input image frame sizes.
引用
收藏
页码:1034 / 1047
页数:14
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