Regenerative ranging (RR) is a turn-around noise free method for measuring the distance of an interplanetary spacecraft from the Earth. Weighted (upsilon= 2,upsilon= 4) and balanced Tausworthe codes (T2B, T4B) are used as pseudo-noise (PN) ranging sequences. In this paper we show how to implement on Field Programmable Gate Arrays (FPGAs) a digital regenerative ranging transceiver that, on the spacecraft, receives a phase modulated ( PM) demodulated PN code with uplink noise, detects the delays of its components and regenerates it digitally. FPGAs are becoming more and more common in the digital radio design world. Digital technology allows a reduction in space, weight and power consumption (SWaP). We present here the detailed Simulink model of the regenerative ranging system. The regenerative receiver is composed of a Phase Locked Loop (PLL) that locks onto the code clock, and of five correlators, which determine the delays of the remaining code components. When the delays of the components have been determined, the T2B or T4B code can be regenerated clean from the noise. Simulink model for the code regenerator is also provided in this paper. Simulink and the Xilinx System Generator (SysGen) for DSP are the fundamental tools to be used when implementing digital circuits on FPGAs. In fact, the SysGen can generate, directly from the Simulink model, Very high speed integrated circuits Hardware Description Language (VHDL) to be loaded onto a Xilinx digital board. If different FPGAs are used, which is often the case for space applications, the generated VHDL file can be manually modified as needed. This paper drives the readers towards the initial stages of the practical implementation of radiation hardened and efficient regenerative ranging circuits on FPGAs. In particular, in this paper, we provide the Simulink model of the whole RR circuit. The proposed architecture has been verified and loaded on our digital boards. It has thoroughly been tested in our laboratories.
