Design of a 60-GHz receiver front-end with broadband matching techniques in 65-nm CMOS

被引:7
作者
Chai, Yuan [1 ]
Li, Lianming [1 ]
Cui, Tiejun [1 ]
机构
[1] Southeast Univ, Sch Informat Sci & Engn, Nanjing 210096, Jiangsu, Peoples R China
关键词
CMOS; receiver; broadband; LNA; down-conversion mixer; 60; GHz; TRANSCEIVER CHIPSET;
D O I
10.1587/elex.15.20180935
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 60-GHz CMOS receiver front-end with wide IF bandwidth is presented. The receiver front-end consists of an LNA, a down-conversion mixer and an IF buffer. In order to support both channel-bonding and single-channel operations, two types of broadband inter-stage matching networks are analyzed from a new perspective and adopted in the design. Fabricated in a 65-nm CMOS process, the receiver front-end achieves wide IF bandwidth, a 39-dB gain, and a 5-dB noise figure in the high-gain mode. In Channel-2 measurement, the receiver front-end achieves a maximum 3-dB IF bandwidth of 6.83 GHz, which covers three channels and meets the channel-bonding bandwidth requirement.
引用
收藏
页数:11
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