Intra-task voltage scheduling for low-energy hard real-time applications

被引：109

作者：

Shin, D ^{[1
]}

Lee, S

Kim, J

机构：

[1] Seoul Natl Univ, Sch Engn & Comp Sci, Seoul 151, South Korea

[2] Ewha Womans Univ, Dept Informat Elect, Seoul, South Korea

来源：

IEEE DESIGN & TEST OF COMPUTERS | 2001年 / 18卷 / 02期

关键词：

Algorithms - Capacitance - CMOS integrated circuits - Computer software - Performance - Portable equipment - Reliability - Threshold voltage - VLSI circuits;

D O I：

10.1109/54.914596

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A novel intra-task voltage-scheduling algorithm controls the supply voltage within an individual task boundary. By fully exploiting slack time, it achieves a high-energy reduction ratio. Using this algorithm, a software tool automatically converts an application into a low energy version.

引用

页码：20 / 30

页数：11

共 10 条

[1]

BURD T, 1996, J VLSI SIGNAL PROC, V2, P203

[2]

FLEISCHMANN M, 2000, P HOT CHIPS 12 S PAL

[3]

Healy CA, 1995, IEEE REAL TIME, P288, DOI 10.1109/REAL.1995.495218

[4]

HONG I, 1999, P 19 IEEE REAL TIM S, P178

[5]

Lee S, 2000, DES AUT CON, P806

[6]

LEE Y, 1999, P 6 INT C REAL TIM C, P272

[7]

LIM SS, 1999, IEEE T SOFTWARE ENG, V21, P593

[8] ALPHA-POWER LAW MOSFET MODEL AND ITS APPLICATIONS TO CMOS INVERTER DELAY AND OTHER FORMULAS [J].

SAKURAI, T ;

NEWTON, AR .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1990, 25 (02) :584-594

[9]

SHIN Y, 1999, P 36 DES AUT C

[10]

Yao F, 1995, AN S FDN CO, P374, DOI 10.1109/SFCS.1995.492493

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